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19fe1a0510
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[Kernel] Add FP8 support with FlashMLA backend (#22668)
Signed-off-by: Matthew Bonanni <mbonanni001@gmail.com>
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2025-08-22 02:26:32 +00:00 |
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7be5d113d8
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[CPU] Refactor CPU W8A8 scaled_mm (#23071)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-08-21 09:34:24 +08:00 |
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0cdbf5e61c
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[Kernel/Quant] Remove the original marlin format and qqq (#23204)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-08-20 15:13:36 -04:00 |
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b17109beea
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[Kernel] CUTLASS MoE FP8: Integrate cuda moe permute/unpermute (#23045)
Signed-off-by: Shixian Cui <shixian@amazon.com>
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2025-08-20 10:35:26 -04:00 |
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4fc722eca4
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[Kernel/Quant] Remove AQLM (#22943)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2025-08-16 19:38:21 +00:00 |
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1c859a1387
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[V0 Deprecation] Remove advance_step (#22969)
Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
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2025-08-15 08:22:31 -07:00 |
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33c63e9547
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[Kernel] [Quantization] Add MXFP4 and bias support for marlin kernel (#22428)
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2025-08-14 11:23:22 -07:00 |
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f919d4cb8f
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[BugFix] Fix logits repetition penalty cuda check (#22592)
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2025-08-10 22:52:31 -07:00 |
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6a51530437
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[Bugfix] Fix 3D input passed into cutlass_scaled_mm (#22278)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-08-06 10:35:20 +08:00 |
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4771df7b2b
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[Feature] Non-contiguous Support for FP8 Quantization (#21961)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-08-05 02:36:43 -07:00 |
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e0e58f9729
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[Bug] Enforce contiguous input for dynamic_scaled_fp8_quant and static_scaled_fp8_quant (#21773)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2025-07-28 19:55:48 +00:00 |
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c7d8724e78
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[Core] FlashInfer CUTLASS fused MoE backend (NVFP4) (#20037)
Signed-off-by: shuw <shuw@nvidia.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-07-17 21:32:45 -07:00 |
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4de7146351
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[V0 deprecation] Remove V0 HPU backend (#21131)
Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
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2025-07-17 16:37:36 -07:00 |
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8cdc371217
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SM100 Cutlass MLA decode with unrestricted num_heads (< 128) for DeepSeek TP (#20769)
Signed-off-by: Alexander Matveev <amatveev@redhat.com>
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2025-07-15 01:06:38 +00:00 |
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47043eb678
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[Kernel] Triton implementation of causal-conv1d for Mamba-based models (#18218)
Signed-off-by: Tuan M. Hoang-Trong <tmhoangt@us.ibm.com>
Co-authored-by: Tuan M. Hoang-Trong <tmhoangt@us.ibm.com>
Co-authored-by: Tyler Michael Smith <tysmith@redhat.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
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2025-07-09 12:53:55 -07:00 |
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3112271f6e
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[XPU] log clean up for XPU platform (#20553)
Signed-off-by: yan <yan.ma@intel.com>
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2025-07-07 01:38:22 -07:00 |
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3d184b95b8
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[feat]: CUTLASS block scaled group gemm for SM100 (#19757)
Signed-off-by: Duncan Moss <djm.moss@gmail.com>
Co-authored-by: Duncan Moss <dmoss@nvidia.com>
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2025-07-04 12:58:04 -06:00 |
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c1909e7e8c
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[Kernels] MoE refactor (#19636)
Signed-off-by: Bill Nell <bnell@redhat.com>
Signed-off-by: ElizaWszola <ewszola@redhat.com>
Co-authored-by: ElizaWszola <ewszola@redhat.com>
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2025-07-02 06:08:27 -07:00 |
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6cc1e7d96d
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[CPU] Update custom ops for the CPU backend (#20255)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-07-01 07:25:03 +00:00 |
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a29e62ea34
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Fix num_token_padding support for static per-tensor scaled_fp8_quant (#20188)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-06-27 22:48:13 -07:00 |
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0740e29b66
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[Feature] add quick all reduce (#19744)
Signed-off-by: ilmarkov <imarkov@redhat.com>
Signed-off-by: Haoyang Li <Haoyang.Li@amd.com>
Co-authored-by: ilmarkov <imarkov@redhat.com>
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2025-06-26 20:54:24 -07:00 |
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d188913d99
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[Refactor] Remove unused library (#20099)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2025-06-26 09:16:10 +00:00 |
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8b8c209e35
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static_scaled_fp8_quant should not run when scale.numel is not 1 (#20076)
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2025-06-25 15:08:03 -04:00 |
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ffb2cd6b54
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[Perf] Optimize moe_align_block_size CUDA kernel (#19572)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-06-17 11:49:26 -07:00 |
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dec66d253b
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[Kernel] GGUF MMVQ kernel for multiple input vectors (#18754)
Signed-off-by: SzymonOzog <szymon.ozog@gmail.com>
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2025-06-16 17:33:26 +08:00 |
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a3319f4f04
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[Bugfix] Enforce contiguous input for dynamic_per_token FP8/INT8 quant (#19452)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-06-12 15:39:15 -04:00 |
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f98548b9da
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[torch.compile][ROCm] Fuse quantization onto attention using a torch.compile pass (#16756)
Signed-off-by: Luka Govedič <lgovedic@redhat.com>
Co-authored-by: Sage Moore <sage@neuralmagic.com>
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2025-06-12 08:31:04 -07:00 |
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2e090bd5df
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[AMD][Kernel][BugFix] fix test_rocm_compressed_tensors_w8a8 for rocm (#19509)
Signed-off-by: Randall Smith <Randall.Smith@amd.com>
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2025-06-12 07:14:24 +00:00 |
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2f1c19b245
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[CI] change spell checker from codespell to typos (#18711)
Signed-off-by: Andy Xie <andy.xning@gmail.com>
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2025-06-11 19:57:10 -07:00 |
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84166fee97
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[Kernel] Integrate CUTLASS MoE kernel with PPLX (#18762)
Signed-off-by: ElizaWszola <ewszola@redhat.com>
Signed-off-by: Tyler Michael Smith <tyler@neuralmagic.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
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2025-06-06 18:26:11 -07:00 |
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61059bee40
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[Hardware][NVIDIA] FP4 MoE kernel optimization (#19110)
Signed-off-by: Chiyue Wei <chiyuew@nvidia.com>
Co-authored-by: Chiyue Wei <chiyuew@nvidia.com>
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2025-06-05 09:48:26 -07:00 |
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5d6d1adf15
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[KERNEL] Sampler. CUDA kernel for applying repetition penalty (#18437)
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2025-06-03 21:13:01 -07:00 |
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02f0c7b220
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[Misc] Add SPDX-FileCopyrightText (#19100)
Signed-off-by: simon-mo <simon.mo@hey.com>
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2025-06-03 11:20:17 -07:00 |
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f2036734fb
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[ModelOpt] Introduce VLLM_MAX_TOKENS_PER_EXPERT_FP4_MOE env var to control blockscale tensor allocation (#18160)
Signed-off-by: Pavani Majety <pmajety@nvidia.com>
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2025-05-23 15:52:20 -07:00 |
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d93c976a0d
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[Kernel] Have rotary embeddings support tensors (#18046)
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
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2025-05-14 15:43:55 -07:00 |
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60f7624334
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Implements dual-chunk-flash-attn backend for dual chunk attention with sparse attention support (#11844)
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2025-05-12 19:52:47 -07:00 |
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d74e5f37bc
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[Kernel] fp4 marlin kernel (#17687)
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
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2025-05-10 19:58:49 -07:00 |
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0c0fdae84f
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[Hardware/NVIDIA/Kernel] Enable nvidia/DeepSeek-R1-FP4 Model (#16362)
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2025-05-09 16:24:41 -07:00 |
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32aa74c09c
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[ROCm][FP8][Kernel] FP8 quantization fused into Custom Paged Attention (#17139)
Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
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2025-05-07 07:12:35 -07:00 |
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98c89e16ff
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Make key optional for rotary embedding (#17566)
Signed-off-by: Yong Hoon Shin <yhshin@meta.com>
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2025-05-07 00:11:46 -07:00 |
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f80ae5bdcf
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[Kernel] Use fused rmsnorm for some models like qwen3 series (#17735)
Signed-off-by: evian <eviantai@u.nus.edu>
Co-authored-by: evian <eviantai@u.nus.edu>
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2025-05-06 23:10:02 -07:00 |
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1a45a61387
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[Kernel] GGUF MoeVec kernel (#16780)
Signed-off-by: SzymonOzog <szymon.ozog@aleph-alpha.com>
Signed-off-by: SzymonOzog <szymon.ozog@gmail.com>
Signed-off-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <2037008807@qq.com>
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2025-05-06 23:07:23 -07:00 |
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1d0c9d6b2d
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[Kernel] some optimizations for dense marlin and moe marlin (#16850)
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
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2025-05-05 09:39:30 -07:00 |
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e3d0a1d190
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[Quantizaton] [AMD] Add support for running DeepSeek int8 w8a8 MoE on ROCm (#17558)
Signed-off-by: Randall Smith <Randall.Smith@amd.com>
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2025-05-02 21:41:10 -07:00 |
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17eb306fcc
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[Bugfix] Add contiguous call inside rope kernel wrapper (#17091)
Signed-off-by: 苏政渊 <suzhengyuan@moonshot.cn>
Co-authored-by: 苏政渊 <suzhengyuan@moonshot.cn>
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2025-04-28 19:24:07 -07:00 |
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ed7a29d9f8
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[NVIDIA] Support Cutlass MLA for Blackwell GPUs (#16032)
Signed-off-by: kaixih <kaixih@nvidia.com>
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2025-04-27 06:29:21 -07:00 |
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188b7f9b8c
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[Performance][ROCm] Add skinny gemms for unquantized linear on ROCm (#15830)
Signed-off-by: charlifu <charlifu@amd.com>
Co-authored-by: Tyler Michael Smith <tysmith@redhat.com>
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2025-04-21 20:46:22 -07:00 |
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d06ba4ed3f
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[Kernel] moe wna16 marlin kernel (#14447)
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
Co-authored-by: Michael Goin <michael@neuralmagic.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-04-14 20:05:22 -07:00 |
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e9528f6dc6
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[Kernel] support merge_attn_states CUDA kernel, 3x speedup (#16173)
Signed-off-by: DefTruth <qiustudent_r@163.com>
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2025-04-11 06:50:50 -06:00 |
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e73ff24e31
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[ROCM][KERNEL] Paged attention for V1 (#15720)
Signed-off-by: Aleksandr Malyshev <maleksan@amd.com>
Signed-off-by: root <root@banff-cyxtera-s65-4.amd.com>
Co-authored-by: Aleksandr Malyshev <maleksan@amd.com>
Co-authored-by: root <root@banff-cyxtera-s65-4.amd.com>
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2025-04-02 19:48:00 -07:00 |
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