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67c14906aa
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Update PyTorch to 2.8.0 (#20358)
Signed-off-by: Huy Do <huydhn@gmail.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
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2025-08-29 18:57:35 +08:00 |
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16a45b3a28
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[NVIDIA] Support SiluMul + NVFP4 quant fusion (#23671)
Signed-off-by: jindih <jindih@nvidia.com>
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Co-authored-by: Luka Govedic <lgovedic@redhat.com>
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2025-08-28 19:36:50 +00:00 |
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714872f1a9
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[Compile] Fix Cmake Warning (#23689)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2025-08-26 23:48:32 +00:00 |
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8a3cd90af5
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[Kernel] Add fused grouped_topk kernel for MoE (#23274)
Signed-off-by: Xin Yang <xyangx@amazon.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2025-08-25 11:47:52 -07:00 |
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e76e233540
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[kernel] Support W4A8 on Hopper (#23198)
Signed-off-by: czhu-cohere <conway.zhu@cohere.com>
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2025-08-24 06:18:04 +00:00 |
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0cdbf5e61c
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[Kernel/Quant] Remove the original marlin format and qqq (#23204)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-08-20 15:13:36 -04:00 |
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21dce80ea9
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[CI/Build] Add support for Python 3.13 (#13164)
Signed-off-by: mgoin <michael@neuralmagic.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>
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2025-08-19 13:49:34 -07:00 |
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4fc722eca4
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[Kernel/Quant] Remove AQLM (#22943)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2025-08-16 19:38:21 +00:00 |
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1c859a1387
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[V0 Deprecation] Remove advance_step (#22969)
Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
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2025-08-15 08:22:31 -07:00 |
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3e6dd40016
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[Bugfix] fix cuda 12.6 and 11.8 build (#22952)
Signed-off-by: Jinzhen Lin <jinzhen.ljz@antgroup.com>
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2025-08-15 10:10:22 +00:00 |
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33c63e9547
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[Kernel] [Quantization] Add MXFP4 and bias support for marlin kernel (#22428)
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2025-08-14 11:23:22 -07:00 |
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3303f134e0
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[Kernel] Add support for block FP8 on SM120 (NVIDIA 5090 and RTX PRO 6000) (#22131)
Signed-off-by: Junhao Li <junhao@ubicloud.com>
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2025-08-07 19:18:28 -07:00 |
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789562c28c
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Support CUTLASS NVFP4 (w4a4) for Blackwell Geforce GPUs (SM120) (#21309)
Signed-off-by: LopezCastroRoberto <roberto.lopez.castro@udc.es>
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2025-08-03 00:54:22 -07:00 |
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176bbce1db
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Revert "[AMD][CI/Build] Fix the AMD issue caused by inappropriate of symbol exposure (#21647)" (#21850)
Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
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2025-07-29 21:56:29 +00:00 |
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9ba1c88a93
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[AMD][CI/Build] Fix the AMD issue caused by inappropriate of symbol exposure (#21647)
Signed-off-by: Lu Fang <lufang@fb.com>
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2025-07-28 20:11:16 +00:00 |
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85d051f026
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[Misc] Removed undefined cmake variables MOE_PERMUTE_ARCHS (#21262)
Signed-off-by: Yang Chen <yangche@fb.com>
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2025-07-24 22:54:23 -07:00 |
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2ded067fd2
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[Bugfix] Fix CUDA arch flags for MoE permute (#21426)
Signed-off-by: Ming Yang <minos.future@gmail.com>
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2025-07-24 03:23:59 -07:00 |
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3ec7170ff1
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[Bugfix][ROCm][Build] Fix build regression on ROCm (#21393)
Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
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2025-07-22 20:27:41 -07:00 |
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774d0c014b
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[Perf] Cuda Kernel for Per Token Group Quant (#21083)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2025-07-22 07:27:15 -07:00 |
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2c8db17cfd
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[feat]: add SM100 support for cutlass FP8 groupGEMM (#20447)
Signed-off-by: Duncan Moss <djm.moss@gmail.com>
Signed-off-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
Co-authored-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-07-22 07:27:12 -07:00 |
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4e7dfbe7b4
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Update PyTorch to torch==2.7.1 for CUDA (#21011)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-07-17 02:30:44 +00:00 |
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8cdc371217
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SM100 Cutlass MLA decode with unrestricted num_heads (< 128) for DeepSeek TP (#20769)
Signed-off-by: Alexander Matveev <amatveev@redhat.com>
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2025-07-15 01:06:38 +00:00 |
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b639327ad9
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Revert "Use NVCC --compress-mode to reduce binary size by 30% #20694" (#20853)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-07-11 23:07:35 -07:00 |
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dc221ad72d
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[Bugfix][Build][Non-CUDA] Only referencing CMAKE_CUDA_COMPILER_VERSION on CUDA where it is defined (#20738)
Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
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2025-07-10 02:58:11 -07:00 |
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49e8c7ea25
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Use NVCC --compress-mode to reduce binary size by 30% (#20694)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-07-09 18:26:48 -07:00 |
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47043eb678
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[Kernel] Triton implementation of causal-conv1d for Mamba-based models (#18218)
Signed-off-by: Tuan M. Hoang-Trong <tmhoangt@us.ibm.com>
Co-authored-by: Tuan M. Hoang-Trong <tmhoangt@us.ibm.com>
Co-authored-by: Tyler Michael Smith <tysmith@redhat.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
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2025-07-09 12:53:55 -07:00 |
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3d184b95b8
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[feat]: CUTLASS block scaled group gemm for SM100 (#19757)
Signed-off-by: Duncan Moss <djm.moss@gmail.com>
Co-authored-by: Duncan Moss <dmoss@nvidia.com>
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2025-07-04 12:58:04 -06:00 |
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9e5552aa13
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[NVIDIA] Support Cutlass w8a8 FP8 for Blackwell Geforce GPUs (sm120) (#17280)
Signed-off-by: kaln27 <liaojuncheng123@foxmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-07-02 06:47:19 -06:00 |
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6c9837a761
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Fix cuda_archs_loose_intersection when handling sm_*a (#20207)
Signed-off-by: Huy Do <huydhn@gmail.com>
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2025-06-29 16:52:34 -07:00 |
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0740e29b66
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[Feature] add quick all reduce (#19744)
Signed-off-by: ilmarkov <imarkov@redhat.com>
Signed-off-by: Haoyang Li <Haoyang.Li@amd.com>
Co-authored-by: ilmarkov <imarkov@redhat.com>
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2025-06-26 20:54:24 -07:00 |
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44d2e6af63
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[Bugfix] Build moe_data for both sm100 and sm90 (#20086)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-06-26 20:50:12 -07:00 |
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bf57ccc5c2
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Remove sm120 arch from sm100 cutlass kernel arch list (#19716)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-06-17 11:49:39 -07:00 |
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bc956b38d0
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Only build CUTLASS MoE kernels on Hopper (#19648)
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2025-06-14 11:44:15 -07:00 |
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59abbd84f9
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[Fix] Allow kernel compilation for CUDA capability 8.7 (#19328)
Signed-off-by: Conroy Cheers <conroy@corncheese.org>
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2025-06-09 02:57:23 -07:00 |
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84166fee97
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[Kernel] Integrate CUTLASS MoE kernel with PPLX (#18762)
Signed-off-by: ElizaWszola <ewszola@redhat.com>
Signed-off-by: Tyler Michael Smith <tyler@neuralmagic.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
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2025-06-06 18:26:11 -07:00 |
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5d6d1adf15
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[KERNEL] Sampler. CUDA kernel for applying repetition penalty (#18437)
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2025-06-03 21:13:01 -07:00 |
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9e6f61e8c3
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[ROCm][Build] Clean up the ROCm build (#19040)
Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
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2025-06-02 20:47:47 -07:00 |
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a3896c7f02
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[Build] Fixes for CMake install (#18570)
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2025-05-27 20:49:24 -04:00 |
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a547aeb828
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feat(rocm-support): support mamba2 on rocm (#18565)
Signed-off-by: Islam Almersawi <islam.almersawi@openinnovation.ai>
Co-authored-by: Islam Almersawi <islam.almersawi@openinnovation.ai>
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2025-05-27 00:07:53 -07:00 |
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1068556b2c
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[Bugfix][Build/CI] Fixup CUDA compiler version check for CUDA_SUPPORTED_ARCHS (#18579)
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2025-05-23 07:43:58 -07:00 |
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6e588da0f4
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[Build/CI] Fix CUDA 11.8 build (#17679)
Signed-off-by: Tyler Michael Smith <tyler@neuralmagic.com>
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Signed-off-by: Tyler Michael Smith <tysmith@redhat.com>
Co-authored-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
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2025-05-22 12:13:54 -07:00 |
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c7852a6d9b
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[Build] Allow shipping PTX on a per-file basis (#18155)
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
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2025-05-15 16:41:55 -07:00 |
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60f7624334
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Implements dual-chunk-flash-attn backend for dual chunk attention with sparse attention support (#11844)
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2025-05-12 19:52:47 -07:00 |
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0c0fdae84f
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[Hardware/NVIDIA/Kernel] Enable nvidia/DeepSeek-R1-FP4 Model (#16362)
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2025-05-09 16:24:41 -07:00 |
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376786fac1
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Add cutlass support for blackwell fp8 blockwise gemm (#14383)
Signed-off-by: Shu Wang <shuw@nvidia.com>
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2025-05-08 15:09:55 -07:00 |
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1d0c9d6b2d
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[Kernel] some optimizations for dense marlin and moe marlin (#16850)
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
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2025-05-05 09:39:30 -07:00 |
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f62cad6431
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[Build/CI] Upgrade CUTLASS to 3.9.2 (#17641)
Signed-off-by: Tyler Michael Smith <tyler@neuralmagic.com>
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2025-05-04 19:23:17 -07:00 |
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c8386fa61d
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[Build/CI] Upgrade CUTLASS to 3.9.1 (#17602)
Signed-off-by: Tyler Michael Smith <tyler@neuralmagic.com>
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2025-05-02 22:25:14 -07:00 |
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3e887d2e0c
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permute/unpermute kernel for moe optimization (#14568)
Signed-off-by: Caleb_Du <Caleb_Du@zju.edu.cn>
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2025-05-02 11:31:55 -07:00 |
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460a2b1100
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[torch.compile] Add torch inductor pass for fusing silu_and_mul with subsequent scaled_fp8_quant operations (#10867)
Signed-off-by: Sage Moore <sage@neuralmagic.com>
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2025-05-01 07:59:28 -07:00 |
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