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https://github.com/vllm-project/vllm-ascend.git
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bcc313e8f2
### What this PR does / why we need it? - Adds the `mla_preprocess` custom kernel to provide an optimized pre-processing operator for Multi-head Latent Attention (MLA) on Ascend NPUs. - Wires the new kernel into the C++ extension pipeline so vLLM can invoke it directly, cutting Python-side tensor shuffling and memory copies that previously bottlenecked MLA compilation paths. ### Does this PR introduce any user-facing change? - No. The change only introduces a low-level kernel; public APIs and inference behavior remain unchanged. ### How was this patch tested? - Dedicated Ascend kernels are not covered by our CI yet, so no extra automated tests were added. Future MLA-focused regression runs will cover this path. - vLLM version: v0.11.0 Signed-off-by: Chen Chen <0109chenchen@gmail.com>
70 lines
2.4 KiB
C++
70 lines
2.4 KiB
C++
/* Adapted from
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* https://gitee.com/ascend/ascend-transformer-boost.git
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*
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* Copyright (c) 2024 Huawei Technologies Co., Ltd.
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* This file is a part of the CANN Open Software.
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* Licensed under CANN Open Software License Agreement Version 1.0 (the "License").
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* Please refer to the License for details. You may not use this file except in compliance with the License.
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
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* INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
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* See LICENSE in the root of the software repository for the full text of the License.
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*/
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#ifndef INCLUDE_UTILS_H
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#define INCLUDE_UTILS_H
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template <typename IN_DTYPE>
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__aicore__ inline void CreateCaMatrix(const AscendC::LocalTensor<IN_DTYPE> &dst, const uint16_t repeats,
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const uint16_t blockNum, const uint16_t dstGap, const IN_DTYPE initValue)
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{
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AscendC::InitConstValue<IN_DTYPE>(dst,
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AscendC::InitConstValueParams<IN_DTYPE>(repeats, blockNum, dstGap, initValue));
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}
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__aicore__ inline void SetFftsBaseAddr(uint64_t config)
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{
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AscendC::SetSyncBaseAddr(config);
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}
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template <typename IN_DTYPE>
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__aicore__ inline void SetPadding(IN_DTYPE padValue)
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{
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AscendC::SetLoadDataPaddingValue<IN_DTYPE>(padValue);
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}
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__aicore__ inline void SetAtomicnone()
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{
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AscendC::SetAtomicNone();
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}
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__aicore__ inline void SetMasknorm()
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{
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#if __CCE_AICORE__ == 100
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return;
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#endif
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AscendC::SetMaskNorm();
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}
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__aicore__ inline void SetNdpara(uint16_t ndNum, uint16_t srcNdStride, uint16_t dstNdStride)
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{
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AscendC::SetFixpipeNz2ndFlag(ndNum, srcNdStride, dstNdStride);
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}
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template <typename IN_DTYPE>
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__aicore__ inline void SetVectorMask(const uint64_t maskHigh, const uint64_t maskLow)
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{
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AscendC::SetVectorMask<IN_DTYPE>(maskHigh, maskLow);
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}
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__aicore__ inline int64_t GetSubBlockidx()
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{
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return AscendC::GetSubBlockIdx();
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}
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__aicore__ inline void WaitFlagDev(uint16_t flagId)
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{
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AscendC::WaitEvent(flagId);
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}
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template <pipe_t pipe, uint8_t mode>
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__aicore__ inline void FftsCrossCoreSync(uint16_t flagId)
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{
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AscendC::CrossCoreSetFlag<mode, pipe>(flagId);
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}
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template <typename IN_DTYPE, bool setRelu = false>
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__aicore__ inline void SetFpc(const AscendC::LocalTensor<IN_DTYPE> &preTensor, bool isUnitFlag = false)
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{
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AscendC::SetFixPipeConfig<IN_DTYPE, setRelu>(preTensor, isUnitFlag);
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}
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#endif
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