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Test Plan: CI Reviewed By: igorsugak Differential Revision: D29401295 fbshipit-source-id: e921e5578c1fcc8df6bd670ae9f95722b8e32d85
147 lines
2.5 KiB
C++
147 lines
2.5 KiB
C++
#pragma once
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#include <cstdint>
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#ifdef _MSC_VER
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#include <intrin.h>
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#endif
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#include <c10/macros/Export.h>
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namespace caffe2 {
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class CpuId;
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TORCH_API const CpuId& GetCpuId();
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///////////////////////////////////////////////////////////////////////////////
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// Implementation of CpuId that is borrowed from folly.
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///////////////////////////////////////////////////////////////////////////////
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// TODO: It might be good to use cpuinfo third-party dependency instead for
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// consistency sake.
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/**
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* Identification of an Intel CPU.
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* Supports CPUID feature flags (EAX=1) and extended features (EAX=7, ECX=0).
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* Values from
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* http://www.intel.com/content/www/us/en/processors/processor-identification-cpuid-instruction-note.html
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*/
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class CpuId {
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public:
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CpuId();
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#define X(name, r, bit) \
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inline bool name() const { \
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return ((r) & (1U << bit)) != 0; \
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}
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// cpuid(1): Processor Info and Feature Bits.
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#define C(name, bit) X(name, f1c_, bit)
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C(sse3, 0)
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C(pclmuldq, 1)
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C(dtes64, 2)
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C(monitor, 3)
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C(dscpl, 4)
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C(vmx, 5)
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C(smx, 6)
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C(eist, 7)
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C(tm2, 8)
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C(ssse3, 9)
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C(cnxtid, 10)
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C(fma, 12)
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C(cx16, 13)
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C(xtpr, 14)
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C(pdcm, 15)
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C(pcid, 17)
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C(dca, 18)
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C(sse41, 19)
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C(sse42, 20)
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C(x2apic, 21)
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C(movbe, 22)
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C(popcnt, 23)
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C(tscdeadline, 24)
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C(aes, 25)
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C(xsave, 26)
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C(osxsave, 27)
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C(avx, 28)
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C(f16c, 29)
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C(rdrand, 30)
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#undef C
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#define D(name, bit) X(name, f1d_, bit)
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D(fpu, 0)
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D(vme, 1)
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D(de, 2)
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D(pse, 3)
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D(tsc, 4)
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D(msr, 5)
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D(pae, 6)
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D(mce, 7)
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D(cx8, 8)
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D(apic, 9)
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D(sep, 11)
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D(mtrr, 12)
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D(pge, 13)
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D(mca, 14)
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D(cmov, 15)
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D(pat, 16)
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D(pse36, 17)
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D(psn, 18)
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D(clfsh, 19)
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D(ds, 21)
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D(acpi, 22)
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D(mmx, 23)
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D(fxsr, 24)
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D(sse, 25)
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D(sse2, 26)
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D(ss, 27)
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D(htt, 28)
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D(tm, 29)
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D(pbe, 31)
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#undef D
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// cpuid(7): Extended Features.
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#define B(name, bit) X(name, f7b_, bit)
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B(bmi1, 3)
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B(hle, 4)
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B(avx2, 5)
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B(smep, 7)
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B(bmi2, 8)
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B(erms, 9)
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B(invpcid, 10)
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B(rtm, 11)
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B(mpx, 14)
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B(avx512f, 16)
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B(avx512dq, 17)
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B(rdseed, 18)
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B(adx, 19)
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B(smap, 20)
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B(avx512ifma, 21)
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B(pcommit, 22)
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B(clflushopt, 23)
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B(clwb, 24)
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B(avx512pf, 26)
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B(avx512er, 27)
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B(avx512cd, 28)
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B(sha, 29)
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B(avx512bw, 30)
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B(avx512vl, 31)
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#undef B
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#define E(name, bit) X(name, f7c_, bit)
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E(prefetchwt1, 0)
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E(avx512vbmi, 1)
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#undef E
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#undef X
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private:
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TORCH_API static uint32_t f1c_;
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TORCH_API static uint32_t f1d_;
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TORCH_API static uint32_t f7b_;
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TORCH_API static uint32_t f7c_;
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};
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} // namespace caffe2
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