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82e428723a
Previously a crash in PyTorch on power systems was fixed with #110708. Even with the fix, the torch_test.py test throws the following error for one of the tests. "Error in cpuinfo: processor architecture is not supported in cpuinfo" This is a follow up patch to fix this error. Fixes #ISSUE_NUMBER Pull Request resolved: https://github.com/pytorch/pytorch/pull/112707 Approved by: https://github.com/albanD
121 lines
3.7 KiB
C++
121 lines
3.7 KiB
C++
#if !defined(__s390x__) && !defined(__powerpc__)
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#include <cpuinfo.h>
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#else
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#include <unistd.h>
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#endif
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// NOLINTNEXTLINE(modernize-deprecated-headers)
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#include <stdint.h>
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// NOLINTNEXTLINE(modernize-deprecated-headers)
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#include <stdlib.h>
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#include "caffe2/core/logging.h"
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#include "caffe2/utils/bench_utils.h"
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namespace caffe2 {
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uint32_t wipe_cache() {
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static uint32_t* wipe_buffer = nullptr;
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static size_t wipe_size = 0;
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if (wipe_buffer == nullptr) {
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#if !defined(__s390x__) && !defined(__powerpc__)
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CAFFE_ENFORCE(cpuinfo_initialize(), "failed to initialize cpuinfo");
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const cpuinfo_processor* processor = cpuinfo_get_processor(0);
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if (processor->cache.l4 != nullptr) {
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wipe_size = processor->cache.l4->size;
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} else if (processor->cache.l3 != nullptr) {
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wipe_size = processor->cache.l3->size;
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} else if (processor->cache.l2 != nullptr) {
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wipe_size = processor->cache.l2->size;
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} else {
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wipe_size = processor->cache.l1d->size;
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}
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#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64
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/*
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* On ARM precise cache size is not available, and cpuinfo may
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* underestimate. Use max for uArch (see src/arm/cache.c)
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*/
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switch (processor->core->uarch) {
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case cpuinfo_uarch_cortex_a5:
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wipe_size = 512 * 1024; /* Max observed */
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break;
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case cpuinfo_uarch_cortex_a7:
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wipe_size = 1024 * 1024; /* uArch max */
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break;
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case cpuinfo_uarch_cortex_a8:
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wipe_size = 1024 * 1024; /* uArch max */
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break;
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case cpuinfo_uarch_cortex_a9:
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wipe_size = 1024 * 1024; /* Max observed */
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break;
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case cpuinfo_uarch_cortex_a12:
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case cpuinfo_uarch_cortex_a17:
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wipe_size = 8 * 1024 * 1024; /* uArch max */
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break;
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case cpuinfo_uarch_cortex_a15:
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wipe_size = 4 * 1024 * 1024; /* uArch max */
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break;
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case cpuinfo_uarch_cortex_a35:
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wipe_size = 1024 * 1024; /* uArch max */
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break;
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case cpuinfo_uarch_cortex_a53:
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wipe_size = 2 * 1024 * 1024; /* uArch max */
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break;
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case cpuinfo_uarch_cortex_a57:
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wipe_size = 2 * 1024 * 1024; /* uArch max */
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break;
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case cpuinfo_uarch_cortex_a72:
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wipe_size = 4 * 1024 * 1024; /* uArch max */
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break;
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case cpuinfo_uarch_cortex_a73:
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wipe_size = 8 * 1024 * 1024; /* uArch max */
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break;
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case cpuinfo_uarch_cortex_a55:
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case cpuinfo_uarch_cortex_a75:
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case cpuinfo_uarch_meerkat_m3:
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wipe_size = 4 * 1024 * 1024; /* DynamIQ max */
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break;
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default:
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wipe_size = 60 * 1024 * 1024;
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break;
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}
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#endif
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#elif defined (__s390x__)
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wipe_size = sysconf(_SC_LEVEL4_CACHE_SIZE);
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if (wipe_size <= 0)
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{
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/*
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* Take current max L4 cache size for s390x
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*/
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wipe_size = 1024 * 1024 * 1024;
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}
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#else
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/* ppc64le */
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wipe_size = sysconf(_SC_LEVEL4_CACHE_SIZE);
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if (wipe_size <= 0) {
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wipe_size = sysconf(_SC_LEVEL3_CACHE_SIZE);
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if (wipe_size <= 0) {
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wipe_size = sysconf(_SC_LEVEL2_CACHE_SIZE);
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if(wipe_size <= 0) {
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wipe_size = sysconf(_SC_LEVEL1D_CACHE_SIZE);
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}
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}
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}
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#endif
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LOG(INFO) << "Allocating cache wipe buffer of size " << wipe_size;
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// NOLINTNEXTLINE(cppcoreguidelines-no-malloc)
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wipe_buffer = static_cast<uint32_t*>(malloc(wipe_size));
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CAFFE_ENFORCE(wipe_buffer != nullptr);
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}
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uint32_t hash = 0;
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for (uint32_t i = 0; i * sizeof(uint32_t) < wipe_size; i += 8) {
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// NOLINTNEXTLINE(clang-analyzer-core.uninitialized.Assign)
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hash ^= wipe_buffer[i];
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wipe_buffer[i] = hash;
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}
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/* Make sure compiler doesn't optimize the loop away */
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return hash;
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}
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} /* namespace caffe2 */
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