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Use unsigned int for bias pipelining hack in Triton FlashAttention. A bitwise AND of 0xFFFFFFFF with a negative integer leads to overflow, which got caught by the latest Triton integration.
PiperOrigin-RevId: 739868199 Change-Id: I732e36901c18e4a07c8907c52412b7475d2ebb64
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@ -83,7 +83,7 @@ def _fwd_kernel_inner(
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# Prevent dot accumulating into the bias tensor. It appears that Triton
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# doesn't pipeline the bias load as it does the `k` load, so the bias load
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# blocks the matmul if the add is merged.
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qk = qk.to(tl.int32, bitcast=True) & 0xFFFFFFFF
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qk = qk.to(tl.uint32, bitcast=True) & 0xFFFFFFFF
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qk = qk.to(tl.float32, bitcast=True)
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qk += bias
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